This invention relates to data processing equipment and more particularly to an improved circuit for indirect arithmetic control of some of the central processing unit functions. Use of this circuit allows a microprogrammable computer to execute a family of instructions in the number of locations required for a single microprogram.
In a typical microprogrammable computer there is a Main Memory containing programs and data words and a Control Memory containing microprograms. Using the computer described herein as an example, an application program stored in Main Memory is composed of words 16 bits in length which specify an operation and the location in Main Memory or in the File of the data to be operated upon. To execute a Main Memory instruction the operation code must be translated into a series of steps involving the operation of circuit elements within the computer. This translation from a Main Memory instruction into a series of hardware steps is accomplished through the execution of a microprogram in the Control Memory.
An example of a Main Memory instruction would be the "Register Exclusive OR And Increment" instruction which exclusive OR's the contents of source and destination registers, increments the result by 1 and loads the final result into the destination register. The single instruction obtained from Main Memory is translated into the eventual series of steps by using the original Main Memory instruction to "call" a microprogram located in the Control Memory which orders all of the steps necessary to implement said Main Memory instruction. Another instruction in the vocabulary of this computer is a "Register OR And Increment" instruction wherein the computer logically OR's the contents of a source and destination register, increments the result by one and loads the final result into the destination register. It can be seen that the difference between the two described instructions is that in one the basic operation is a Logical Exclusive OR and in the other the instruction is a Logical OR. The most basic method of translating these instructions into hardware steps is to use a separate microprogram for each instruction. Of course, this increases the size of the Control Memory required.
An improvement over the above system is to provide within the central processing unit a four bit function register to specify which particular logical or arithmetic operation is required of the Arithmetic Logic Unit (ALU). Thus, a single program can be used to implement both instructions by loading the function register with the four bit code of the operation required, running a single microprogram, and at the appropriate point in that microprogram use the contents of the function register to indirectly specify the operation of the Arithmetic Logic Unit rather than specifying it directly through bits of the microprogram instruction.
One problem with this system is that a separate loading step is required at the beginning of the microprogram which slows down instruction execution time. Another problem is that this system can be used for that family of instructions that differs only in its Arithmetic Logic Unit function. It would be advantageous to have a system which allows for instructions that differ in File locations and in the way the Carry Input is handled as well.